The present invention relates to a Class-D amplifier used in fields such as audio, etc., and particularly to a Class-D amplifier that is improved to reduce the distortion and enhance the dynamic range.
Related PWM-modulation based Class-D amplifiers are designed so that a signal output from a PWM (pulse width modulation) circuit and then varied to an analog signal by a low-pass filter is converted to digital data by ADC (Analog/Digital Converter), and fed back to the front stage of the PWM circuit in order to reduce distortion (see Patent Document 1).
However, according to the construction as described above, there is a problem that the number of parts is increased and also the price is increased because ADC is needed.
Furthermore, the related Class-D amplifiers for subjecting PCM signals to PWM conversion have a problem that the dynamic range is determined by the clock frequency of the PWM circuit and only a dynamic range of 60 dB is achieved even when the clock frequency is equal to 300 MHz.
Patent Documents 2 to 5 are also known as documents in which conventional Class-D amplifiers are described.    Patent Document 1: JP-A-59-183510    Patent Document 2: JP-T-2002-536903    Patent Document 3: JP-A-06-152269    Patent Document 4: JP-A-2003-110376    Patent Document 5: JP-T-2000-500625